DS17285S-3NT【PDF 7/31 页】IC RTC 3V 2K NV RAM 24-SOIC

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Sheet目录1994

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Bits 3 to 0: Rate Selector Bits (RS3 to RS0). These

four rate-selection bits select one of the 13 taps on the

15-stage divider or disable the divider output. The tap

selected can be used to generate an output square

wave (SQW pin) and/or a periodic interrupt. The user

can do one of the following:

1) Enable the interrupt with the PIE bit;

2) Enable the SQW output pin with the SQWE or E32k

bits;

3) Enable both at the same time and the same rate; or

4) Enable neither.

Table 4 lists the periodic interrupt rates and the square-

wave frequencies that can be chosen with the RS bits.

DS17285/DS17287/DS17485/DS17487/DS17885/DS17887

Real-Time Clocks

____________________________________________________________________

Table 4. Periodic Interrupt Rate and Square-Wave Output Frequency

EXT REG B

SELECT BITS REGISTER A

E32K

RS3

RS2

RS1

RS0

tPI PERIODIC INTERRUPT

RATE

SQW OUTPUT FREQUENCY

None

3.90625ms

256Hz

7.8125ms

128Hz

122.070s

8.192kHz

244.141s

4.096kHz

488.281s

2.048kHz

976.5625s

1.024kHz

1.953125ms

512Hz

3.90625ms

256Hz

7.8125ms

128Hz

15.625ms

64Hz

31.25ms

32Hz

62.5ms

16Hz

125ms

8Hz

250ms

4Hz

500ms

2Hz

32.768kHz

RS3 to RS0 determine periodic interrupt rates as listed for E32K = 0.

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